Integrated circuit technology has revolutionized various fields, including computers, control systems, telecommunications and imaging. In the field of imaging, the charge coupled device (CCD) image sensor has made digital imaging possible. An alternative low cost technology to CCD image sensors is the CMOS active pixel image sensor. Not only are imaging devices using CMOS image sensor technology less expensive to manufacture relative to the CCD imaging device, but the signal processing circuitry can be fabricated alongside the imaging circuitry, thus allowing for a single integrated chip to form a complete stand alone imaging device.
Because of their lower cost, CMOS imaging devices are now used in many applications. Some of these applications are in high temperature environments, such as automotive applications. However, elevated temperatures at the photodiode sites can cause the CMOS image sensor to experience degradation in performance. Specifically, unwanted “dark current” increases exponentially with the operating temperature of the image sensor. The dark current contributes to the noise and limits the amplification that can be applied to the output signal of each pixel of the image sensor. This results in a diminished signal-to-noise ratio (SNR) and poorer image quality than may be realized at lower operating temperatures. Elevated temperatures at the photodiode sites may result when the photodiodes are proximal to high speed peripheral circuits that may generate heat during operation.
Backside illuminated (BSI) CMOS image sensors (CIS) are formed by bonding image sensor device wafers to carrier wafers followed by thinning down the silicon substrate of the device wafers. With less silicon substrate remaining, heat generated by the peripheral circuitry is not dissipated as readily and may propagate into the imaging array region and degrade image quality.
One technique for managing heat buildup in a CMOS image sensor is to secure an active electronic cooling device to the CMOS image sensor, which is integrated into the chip package. The active electronic cooling device may be a Peltier, Seebeck, Thompson or other physical effect device that causes heat to be transported by the flow of electric current. A Peltier device will transport heat from one side of the device, known as the cold side, to the other side of the device, known as the hot side, when current flows through the Peltier device. Thus, by placing the cold side of the Peltier device proximal to the CMOS image sensor, the CMOS image sensor may be cooled.
This arrangement may work well with a front side illuminated CMOS image sensor in which the backside of the device is free to be placed proximal to the Peltier device. However, for backside illuminated devices the backside must remain unobstructed with respect to the light coming from the image. The frontside of these devices will have circuit related metal interconnect lines and insulating layers that may significantly restrict heat flow from the image sensor substrate out to a heat sinking device.
BSI CIS are formed by bonding the frontside (circuit side) of image sensor device wafers to carrier wafers followed by thinning the backside of the device wafers. For small pixel size image sensors, the final device wafer thickness is very thin, perhaps only several microns. This is shown in FIG. 1 which shows a cross section of image sensor 100. Device wafer substrate 110, upon which photodiode array elements 112 have been fabricated within pixel array region 115 and periphery circuits have been fabricated within periphery circuit region 125, has been thinned. Shallow trench isolation (STI) regions 120 isolate pixels from each other, as well as, isolate electrical components within the peripheral circuitry. Carrier wafer 150 was previously bonded to the frontside of the device wafer in order to support it during the thinning process. The device wafer is insulated from carrier wafer 150 by the frontside backend of line (BEOL) film stack which includes first metal interconnect layer 130, second metal interconnect layer 140, and inter-metal dielectrics and passivation films 145. FIG. 1 also illustrates an insulated through-silicon-via (TSV) 101 extending through carrier wafer 150. Insulated TSV 101 includes metal post 160, insulating layers 155 and 157, and top metal lead 180. Insulated TSV 101 is used to electrically connect the metal interconnects of the device wafer circuit elements to the region above the carrier wafer where redistribution top metal leads 180 are formed. The TSV post is electrically insulated from carrier wafer 150. Inter-metal dielectric and passivation films 145 and insulating regions 155 are relatively poor thermal conductors compared to silicon. Heat generated during device operation on the Si device wafer cannot be effectively dissipated to carrier wafer 150, resulting in excessive heat buildup in the device wafer. This leads to higher operating temperature and poorer performance of the BSI image sensor (e.g. higher dark current and white pixels).